SM5921A

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The SM5921A is an SDRAM controller LSI for audio applications. It stores 64-fs slot 3-wire serial format audio data input at sampling frequency fs in SDRAM, and can access data at an arbitrary address to add a delay to each channel data. It also has a direct mute function to mute the audio data. Operating voltage is 3 to 3.6V and is supplied in 64-pin QFP

Datasheets

PDFSM5921A.pdf

Key Features

  • System clock input
  • 64fs (fs = 32 to 192kHz) bit clock
  • Sampling frequency : fs = 32 to 192kHz support
  • Data input/output
  • 3-wire serial, 8-channel PCM
  • 64 clock/slot, word clock polarity inversion
  • Direct mute function
  • MCU interface : 3-wire serial
  • Delay settings : sum of intrinsic delay and individual delay
  • Intrinsic delay (common to all channels, default = 0 samples, 16-sample units)
  • Individual delay (independent for each channel, default = 0 samples, 1-sample units)
  • Maximum delay values
  • 1365.3ms @ fs = 48kHz
  • 682.7ms @ fs = 96kHz
  • 341.3ms @ fs = 192kHz
  • Address shift function :x1, x2, x4 support
  • Delay time can be multiplied between x1, x2, or x4 times without changing the delay set value.
  • SDRAM interface : 16M/64M/128M (x16 devices supported)
  • Package:LQFP-64-100100-1
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